Pin Mapping


On the LPC2103 (ARMmite, ARMexpress LITE and ARMmite PRO there is only one 32 bit IO port.  The first product was the ARMexpress which also has a single 32 bit IO port.  As the ARMexpress is footprint compatible with the Parallax BASIC stamp, the assignment of IOs was done to match that BASIC stamp.  As some ports were used for special functions, like the debug serial port, IOs 0 through 15 were not available.  So that assignment does not match the bit assignment by NXP.   To accomplish this the pins were remapped using an array in firmware, so that a call like IO(4) on the ARMmite will lookup 4 in an array which corresponds to P0(20)

On the LPC2138 in the ARMweb and DINkit, all pins correspond to the NXP assigned bit mapping. , There are 10 additional lines in a second port, which can be accessed using the ARMbasic P1(x) keyword.  They may also be accessed with IO, DIR, IN, OUT... with firmware version 7.50 and later as IO(x) where x= 48 to 55 corresponding to P1(16) to P1(23)

On the LPC175x of the SuperPRO and PROplus there are 4 ports that have a subset of the 32 pins connected to the outside.  These pins are accessed by P0(x) through P4(x) to read or write the state.  As of firmware version 8.12, the IO, IN, OUT, DIR keywords are also used, with indexes 0-31 for P0, 32-63 for P1, 64-95 for P2 and 128-159 for P4.

ARMbasic provides mechanisms to control the direction and state of these pins with IO, the direction with DIR, and the state with OUT, or read with IO or IN.

These correspond to the low level registers defined by NXP FIOxDIR register, FIOxSET and FIOxCLR registers.   The state of the pin can be read at anytime with the FIOxPIN register.  Each of these registers consists of 32 bits each bit corresponding to a pin.   When a bit in the FIOxDIR register is 1, then that pin is an output.  The state of that output can be controlled by writing a 1 to that bit of the FIOxSET register to make it high or  write 1 to that pin of the FIOxCLR register to make it low.   Writing 0s to the FIOxSET and FIOxCLR registers do not affect those pins.



On the BASICchip, BASICboard, PROstart, PROplus, SuperPRO there is no re-mapping of pins, so the bit positions match the NXP assignments.

On the ARMmite, the pin re-mapping can be viewed as code like the following:

#include <LPC21xx.bas>

CONST ReMap={9,8,30,21,20,29,4,5,6,7,13,19,18,17,16,15}

#define OUTPUT(x) FIO0DIR = FIO0DIR or (1 << ReMap(x))
#define INPUT(x)     FIO0DIR  = FIO0DIR and not (1 << ReMap(x))
#define IN(x)           P0(ReMap(x))
#define OUT(x)       P0(ReMap(x))
#define HIGH(x)      P0(ReMap(x))= 1
#define LOW(x)      P0(ReMap(x)) = 0

On the PRO, the pin re-mapping can be viewed as code like the following:

#include <LPC21xx.bas>

CONST ReMap={9,8,27,19,28,21,5,29,30,16,7,13,4,6,20,15}

#define OUTPUT(x) FIO0DIR = FIO0DIR or (1 << ReMap(x))
#define INPUT(x)    FIO0DIR = FIO0DIR and not (1 << ReMap(x))
#define IN(x)          P0(ReMap(x))
#define OUT(x)       P0(ReMap(x))
#define HIGH(x)     P0(ReMap(x))= 1
#define LOW(x)      P0(ReMap(x)) = 0

See also