Yeah... I just typed in the edit here on the forum. So much nicer to have the compiler catch that sort of typo! <G>
Now... back to re-edit.
Lloyd
Search found 99 matches
- Wed Nov 12, 2014 2:39 am
- Forum: Power Issues
- Topic: NVRAM
- Replies: 13
- Views: 37331
- Tue Nov 11, 2014 6:01 pm
- Forum: Power Issues
- Topic: NVRAM
- Replies: 13
- Views: 37331
Re: NVRAM
Well, DAWM! I just discovered a bug in my code. The Disable routine below MUST NOT use XOR, unless an enable was done first. Otherwise, XOR sets the bit, rather than clearing it. It should read thus: sub BOD_Disable BOD_ISR = ADDRESSOF Do_Brownout_ISR ' DISable the BOD interrupt. VICIntEnable AND= (...
- Sun Nov 09, 2014 11:47 pm
- Forum: Power Issues
- Topic: NVRAM
- Replies: 13
- Views: 37331
Re: NVRAM
Ahhh... &H400FC180 (The RSID register) bit 3 contains a flag that is set when power voltage falls below the BOD trigger level. This register is defined in LPC17xx.bas as SCB_RSIR One could watch that bit with BOD interrupt disabled, then when it becomes set to a "1", enable the interrupts, and see w...
- Sun Nov 09, 2014 6:19 pm
- Forum: Power Issues
- Topic: NVRAM
- Replies: 13
- Views: 37331
Re: NVRAM
PS to Gary. If you have much to do to create your 'saved state', it would be reasonable to do it in a systick-driven or event-driven sub, rather than within the BOD IRQ, but with one limitation: Because it might be possible to get a BOD interrupt during your construction of the saved value, it would...
- Sun Nov 09, 2014 12:02 am
- Forum: Power Issues
- Topic: NVRAM
- Replies: 13
- Views: 37331
Re: NVRAM
Here is the one interrupt routine, two subs for enable and disable of the IRQ, and a tiny pseudo-code example that sets up to use the pack_date discussed above. I'm good at forgetting the purpose of various statements I write , so there are MANY more comments than code... comments are 'free', even i...
- Fri Nov 07, 2014 11:08 am
- Forum: Power Issues
- Topic: NVRAM
- Replies: 13
- Views: 37331
Re: NVRAM
Actually, bit 0 is the position the flag occupies in the hardware from which I read it, so it seemed natural to place it there. With the bit-shifting nature of that packing algorithm, one isn't limited to where the flag can go -- any bit; although it would require a couple more statements to pack th...
- Thu Nov 06, 2014 10:41 pm
- Forum: Power Issues
- Topic: NVRAM
- Replies: 13
- Views: 37331
Re: NVRAM
The BASIC on the LPC1756 isn't as fast as tight C code, but in the scheme of things, I'd calling "Blindingly Fast!!!". There's plenty enough time to pack that date AND do probably another 50 lines of code after it in the short time between a brown-out interrupt and the final stoppage of the CPU by t...
- Mon Nov 03, 2014 2:12 am
- Forum: Power Issues
- Topic: NVRAM
- Replies: 13
- Views: 37331
Re: NVRAM
As part of this quest to save states when power fails, I needed to conserve memory, since there are only 20 bytes (5 integer's worth) of NVRAM in the RTC backup registers. "BOD" stands for "Brownout Detect". I'll document the interrupt method to employ it on the LPC17xx devices as time permits. Belo...
- Sun Nov 02, 2014 10:56 am
- Forum: Power Issues
- Topic: NVRAM
- Replies: 13
- Views: 37331
Re: NVRAM
Yep... and with three stages of falling/rising supply detection, it provides a lot of detail on what's happening in the few tens of milliseconds as power is failing. In my scenario, I must both detect the falling supply, and read a couple of GPIO inputs to see if the problem was caused by a use hitt...
- Fri Jun 13, 2014 4:33 pm
- Forum: Kitchen sink
- Topic: crimson editor version
- Replies: 4
- Views: 11879
Re: crimson editor version
If you haven't already, give JEdit a try. It's very clean, simple, and never seems to upchuck on me.
LLoyd
LLoyd