Ahhh... &H400FC180 (The RSID register) bit 3 contains a flag that is set when power voltage falls below the BOD trigger level.
This register is defined in LPC17xx.bas as SCB_RSIR
One could watch that bit with BOD interrupt disabled, then when it becomes set to a "1", enable the interrupts, and see what happens.
I really don't have time to explore that now. Anyone who would, please do.
LLoyd
NVRAM
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- Posts: 99
- Joined: Mon Apr 15, 2013 3:51 pm
- Location: NE Central FL
Re: NVRAM
Well, DAWM! I just discovered a bug in my code.
The Disable routine below MUST NOT use XOR, unless an enable was done first. Otherwise, XOR sets the bit, rather than clearing it.
It should read thus:
sub BOD_Disable
BOD_ISR = ADDRESSOF Do_Brownout_ISR ' DISable the BOD interrupt.
VICIntEnable AND= (NOT(1<<23)) ' interrupt number of the BOD
endsub
The Disable routine below MUST NOT use XOR, unless an enable was done first. Otherwise, XOR sets the bit, rather than clearing it.
It should read thus:
sub BOD_Disable
BOD_ISR = ADDRESSOF Do_Brownout_ISR ' DISable the BOD interrupt.
VICIntEnable AND= (NOT(1<<23)) ' interrupt number of the BOD
endsub
Last edited by AMDlloydsp on Wed Nov 12, 2014 2:40 am, edited 1 time in total.
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- Posts: 99
- Joined: Mon Apr 15, 2013 3:51 pm
- Location: NE Central FL
Re: NVRAM
Yeah... I just typed in the edit here on the forum. So much nicer to have the compiler catch that sort of typo! <G>
Now... back to re-edit.
Lloyd
Now... back to re-edit.
Lloyd