Watchdog timer

[YahooArchive]

>from the help line
>How do you control the ARM7 watchdog timer reset interval using coridium basic?
What is the default reset interval?


BASIC does not have built in support for the watchdog timer, but you can read
and write the registers directly to set it up to be active. Access via
pointers, and the HWPWM.bas is a good example of how to read and write hardware
registers.

The default condition of the watch dog timer is not enabled in BASIC.

Details in the User manual from NXP for the appropriate part (for the most part
they are all similar).

And you can test for a watchdog reset condition at the start of your program by
reading the SYSCON RSIR register.

A link to the user manual is in the help file or at the time of this writing its
at--

http://www.nxp.com/acrobat/usermanuals/UM10161_4.pdf

[YahooArchive]

>from the help line
>I would like to request that you impliment the Watchdog into the Basic
programing laungage. I am in need of using that but really don\'t know how to
by just setting the registers.

We won't build it into the BASIC, but its pretty easy to use, and this could be
made into a library routine

------------------------------------------------
#include <LPC17xx.bas>

if SCB_RSIR and 4 then print "watchdog happened" else print "normal reset"

print "starting"
WD_WDTC = 9000000 ' timeout in steps of 3,000,000 per second -- 3 seconds
WD_WDMOD = 3 ' enable the timer
WD_WDFEED = $AA ' required feed sequence to enable it
WD_WDFEED = &H55

FIO2DIR = 1<<10

for i=1 to 20
P2(10)=i and 1
wait (500)
print i;" ";

WD_WDFEED = $AA
WD_WDFEED = &H55

next i

print "starting again without WD reset"

for i=1 to 100
FIO2DIR = 1<<10
P2(10)=i and 1
wait (500)
print i;" ";
next i

print "will never get here"

-------------------------------------------------------

and here's what happens --


Programming Flash 1751...
ARMbasic[8.09e] on the PC Copyright 2011, Coridium Corp.
*+*+
... 0.45K code 0.09K string 0.07K data programmed

Executing...

normal reset
starting
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 starting again without WD
reset
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

watchdog happened
starting
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 starting again without WD
reset
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17