forced reboot of SuperPro

[AMDlloydsp]

I had a need to force the (near) equivalent of a hardware reset on the SuperPro. It doesn't directly support it by any means except a few of the interrupts. With a bit of niggling, I got this to work. Addresses might change on other NXP chips. I'm using the standard BASICTools poke equivalents.

Lloyd

#define WDMOD *&H40000000 ' watchdog mode register
#define WDFEED *&H40000008 ' watchdog timer feed register, must get an "AA" followed by a "55" to work
#define WDTC *&H40000004 ' watchdog timer timeout constant register
.
.
.
interrupt(0) ' turn off interrupts, so my local IRQs cannot interrupt our settings of the Watchdog timer
WDTC = &H000000FF ' set the time constant to the minimum
WDMOD = &H00000003 ' set the WDMOD register to enable interrupts and start the watchdog with WDEN and WDRESET true
WDFEED = &H000000AA ' poke the Watchdog timer feed register with the start of a feed command
WDFEED = &H00000055 ' finish the feed command. At LEAST ONE successful feed must occur to assert WDRESET
WDFEED = &H000000AA ' now start another feed, but this time,
WDTC = &H00000000 ' cause a fault interrupt by not completing it properly with a 0x55
interrupt(1) ' just on GPs to keep things balanced, not that it will have any effect, since a reset is occurring

[olzeke51]

just a quick thot : there is no EINT available??

olzeke51
update - didn't see any on the Schematic !!! just the reset from the dongle and a switch

[AMDlloydsp]

I didn't have any i/o pins available to assert an external interrupt, even if it supported it. I could have always hard-wired it on the board.

But I like being able to force it from (purely) software. As Bruce demonstrated in another thread, just jumping to the boot ROM start didn't accomplish a 'full' reset. This appears to work just fine. User code cranks up without any other intervention.

http://www.coridiumcorp.com/forum/viewt ... hdog#p2283

Lloyd
(PS... I'm going to re-post this in that thread, also, since it seems applicable)

[AMDlloydsp]

BTW... it turns out that Bruce already defined all those registers for us.

Here are the defs from LPC17xx.bas (from BASICLIB)

#define WDG_BASE_ADDR &H40000000
#define WD_WDMOD *(WDG_BASE_ADDR + &H00)
#define WD_WDTC *(WDG_BASE_ADDR + &H04)
#define WD_WDFEED *(WDG_BASE_ADDR + &H08)
#define WD_WDTV *(WDG_BASE_ADDR + &H0C)
#define WD_WDCLKSEL *(WDG_BASE_ADDR + &H10)

Lloyd