FIQ interrupts (2103)

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> I got a memory dump at location 0.
> The first value value is 0x40. That's the location of the Reset Handler.
>
> The next value is 0x2720. It should be the location for the Undefined Address
exception, but the Undefined Address is located at 0x924.

In MakeItC there is an option to generate an ASM listing of your code (under
Edit menu), that is post linking, so that would give you some insight as to why
its not as expected.

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I have been looking at the ASM listing. Here is part of Crt0.S, where these
exception address are loaded.
 

.text
.arm
.global Reset_Handler
.global _startup
.func   _startup
_startup:
# Exception Vectors
_vectors:       ldr     PC, Reset_Addr        
                ldr     PC, Undef_Addr
                ldr     PC, SWI_Addr
                ldr     PC, PAbt_Addr
                ldr     PC, DAbt_Addr
                nop       /* Reserved Vector (holds Philips ISP checksum) */
                ldr     PC, [PC,#-0xFF0] /* see page 71 of "Insiders Guide to
the Philips ARM7-Based Microcontrollers" by Trevor Martin  */
                ldr     PC, FIQ_Addr
 
It appears that Reset_Handler is defined as global, while the other exceptions
are not.

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Defining the Exception Routines as .global doesn't solve the problem.

Reset_Handler is contained in Crt0.S, the other Exception Routines are in the
file with the Main

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OK, the addresses in the exception vectors are those of the exception handlers.
I put a breakpoint in the FIQ_ISR code, and the program never got there.

The problem has to be in the EINT0/FIQ setup.

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I dumped the registers for the Interrupt setup.

@FFFFF000
00000000 00000000 00003008 00004000 00004040 00000000 00000000 00000000

FFFFF004 should be 00004000. I think that FFFFF008 should be 00007008. FFFFF00C
is Interrupt Select Register and is correct. FFFFF010 is the Interrupt Enable
Register and should be 00004000.

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FFFFF010 is correct, EINT0 and Timer1 Interrupts are enabled.

I am going to move the breakpoint futher into the code, so the Interrupt Status
Register should show the EINT0 Interrupt active.

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I moved the breakpoint until after pin 15 is set HIGH. Here is the memory dump
at FFFF000.
FFFFF000
00000000 00004000 00007008 00004000 00004040 00000000 00000000 00000000.

Those values are correct for a FIQ Interrupt from EINT0.

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I implemented what you are trying to do using Oberon-07 instead of C this
morning and it works OK. My dump of the registers just after initialisation is:

00000000H
00000000H
00003008H
00004000H
00004000H
00000000H
00000000H
00000000H
00000000H

I can upload the source code to the files section if you think it will help.

--
Chris Burrows
CFB Software
Astrobe: LPC2000 Oberon-07 Development System
http://www.astrobe.com

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A few additional items you may need to take care of:

1. I'd recommend:

VICIntSelect |= 0x00004000; //Select EINT0 as FIQ Interrupt
VICIntEnable |= 0x00004000; //Enable EINT0 Interrupts

to avoid cancelling any other VIC interrupts that may have been set up.

2. Assign EINT0 to an *unused* VIC slot and enable the slot (see the description
of the VICVectCtrl registers in the user manual).

3. Until you get it working try doing something simpler in the interrupt handler
e.g. just increment a global counter. If printf uses interrupt-driven IO you
might encounter problems with nested interrupts.

4. Set bit 0 of EXTINT in your interrupt handler, before returning, to clear the
EINT0 interrupt.

Regards,
Chris Burrows
CFB Software

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This is the only active code in the FIQ_ISR. It never executes.

if ((UART0_LSR && 0x040) == 1) UART0_THR = (char)'W';

This is the current version of the Interrupt Setup Code in the Main program.

SCB_EXTINT = 0x01; //clears EINT0 Interrupts
SCB_EXTMODE = 0x01; //Sets EINT0 to Edge Triggered
SCB_EXTPOLAR = 0x01; //Sets EINT0 to be rising edge sensitive
PCB_PINSEL1 |= 0x00000001; //Select PIN 14 as EINT0
VICIntSelect |= 0x00004000; //Select EINT0 as FIQ Interrupt
VICIntEnable |= 0x00004000; //Enable EINT0 Interrupts
SCB_EXTINT = 0x01; //clears EINT0 Interrupts